Technical Field
The present disclosure relates to a method for manufacturing an electronic device, in particular a high-electron-mobility transistor (HEMT), and to the electronic device thus obtained.
Description of the Related Art
Known to the art are HEMTs with a heterostructure, made in particular of gallium nitride (GaN) and gallium and aluminum nitride (AlGaN). For instance, HEMT devices are appreciated for use as power switches thanks to their high breakdown threshold. Furthermore, the high current density in the conductive channel of the HEMT enables a low ON-state resistance (RON) of the conductive channel to be obtained.
To favor use of HEMTs in high-power applications, HEMTs with normally off channel have been introduced. HEMT devices with recessed-gate terminal have proven particularly advantageous for use as transistors with normally off channel. A device of this type is, for example, known from Wantae Lim et al., “Normally-Off Operation of Recessed-Gate AlGaN/GaN HFETs for High Power Applications”, Electrochem. Solid-State Lett. 2011, volume 14, issue 5, H205-H207.
This HEMT has a gate trench that extends in depth in the heterostructure until it reaches the GaN layer. Extending in said trench is the gate metallization, which is separated from the AlGaN/GaN layers that form the heterostructure by a gate dielectric layer. Formation of the gate trench is obtained by known steps of chemical etching and generates morphological defectiveness of various nature, such as for example even extensive surface corrugations or in general damage generated by the etching process (such as, for example, depressions or protuberances).
An important step in the manufacture of HEMTs with recessed gate terminal lies precisely in the minimization of defectiveness at the interface between the GaN semiconductor layer belonging to the heterostructure and the gate dielectric. The presence of such defectiveness, in fact, is the cause of a wide range of problems, amongst which a reduced threshold voltage, a high noise signal, a high ON-state resistance, and in general a reduction of the levels of performance of the device.
In order to reduce the aforementioned interface defectiveness, the relevant literature reports numerous techniques, amongst which cleaning of the trench prior to the step of deposition of the dielectric and of the gate metallization.
Cleaning of the trench may be carried out using a Piranha solution and hydrofluoric acid (HF), as taught by Neeraj Nepal in “Assessment of GaN Surface Pretreatment for Atomic Layer Deposited High-k Dielectrics”, Applied Physics Express, Volume 4, Number 5, 2011.
Another method of a known type envisages use of TMAH (tetramethylammonium hydroxide), as suggested by Ki-Won Kim et al., “Effects of TMAH Treatment on Device Performance of Normally Off Al2O3/GaN MOSFET”, IEEE Electron Device Letters, Volume 32, Issue 10, October 2011, with the aim of reducing the roughness of the exposed surface in the trench and eliminating the surface damage deriving from an aggressive plasma etch during formation of the trench itself.
Even though the methods referred to above enable an improvement of the levels of performance to be obtained, the field-effect mobility is relatively low (<60 cm2/Vs).
Other methods proposed envisage a thermal treatment at high temperature (600-900° C.) of the GaN surface exposed through the trench in order to limit absorption of contaminants, such as oxygen and carbon. An excellent result, in terms of absence of absorption, is obtained at temperatures of 950° C. However, a thermal treatment at this temperature may cause serious damage to the exposed GaN surface.